7 #ifndef OTAWA_SIM_CACHE_DRIVER_H
8 #define OTAWA_SIM_CACHE_DRIVER_H
41 #endif // OTAWA_SIM_CACHE_DRIVER_H
result_t
This enumeration allows to know the result of a cache access.
Definition: CacheDriver.h:22
A read is performed on the cache.
Definition: CacheDriver.h:28
elm::io::IntFormat address(Address addr)
Build a format to display addresses.
Definition: base.cpp:213
static CacheDriver & ALWAYS_MISS
This cache driver specialization generates a miss each time it is accessed.
Definition: CacheDriver.h:36
The result of a cache access produces a miss.
Definition: CacheDriver.h:23
This class provides a simple interface to drive the cache management unit of a simulator.
Definition: CacheDriver.h:20
static CacheDriver & ALWAYS_HIT
This cache driver specialization generates a hit each time it is accessed.
Definition: CacheDriver.h:35
The representation of an address in OTAWA.
Definition: base.h:54
virtual result_t access(address_t address, size_t size, action_t action)=0
This function is called each time the cache is accessed.
A write is performed on the cache.
Definition: CacheDriver.h:29
virtual ~CacheDriver(void)
Definition: sim_CacheDriver.cpp:58
The result of a cache access produces a hit.
Definition: CacheDriver.h:24
action_t
This enumeration identifies the kind of cache access.
Definition: CacheDriver.h:27
action_t
Definition: cfg_DelayedBuilder.cpp:68