Otawa  0.10
arm.h
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1 /*
2  * $Id$
3  * Copyright (c) 2007, IRIT - UPS <casse@irit.fr>
4  *
5  * Star12X class declarations
6  * This file is part of OTAWA
7  *
8  * OTAWA is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * OTAWA is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with Foobar; if not, write to the Free Software
20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21  */
22 #ifndef OTAWA_LOADER_ARM_H
23 #define OTAWA_LOADER_ARM_H
24 
25 #include <otawa/properties.h>
26 #include <otawa/prog/Inst.h>
27 
28 namespace otawa { namespace arm {
29 
30 class IOManager {
31 public:
32  virtual ~IOManager(void);
33  virtual void write(Address a, t::uint32 size, t::uint8 *data) = 0;
34  virtual void read(Address a, t::uint32 size, t::uint8 *data) = 0;
35 };
36 
37 class Info {
38 public:
40  static const t::uint32
41  IS_MLA = 0x80000000,
42  IS_TWO_REG = 0x40000000,
43  IS_SEMIHOST = 0x20000000,
44  IS_SWP = 0x10000000,
45  IS_THUMB_BX = 0x08000000;
46 
47  virtual ~Info(void);
48  virtual void *decode(Inst *inst) = 0;
49  virtual void free(void *decoded) = 0;
50  virtual t::uint16 multiMask(Inst *inst) = 0;
51  virtual void handleIO(Address addr, t::uint32 size, IOManager& man) = 0;
52 };
53 
54 
55 // deprecated definitions
56 typedef enum multiple_t {
58  only_one = 1,
59  several = 2
60 } multiple_t;
61 
66 
67 } } // otawa::arm
68 
69 #endif // OTAWA_LOADER_ARM_H
struct otawa::sem::inst inst
Identifier< bool > IS_MLA
This property is put the ARM loader on instruction representing the ARM "MLA" instruction.
static const t::uint32 IS_SEMIHOST
Definition: arm.h:43
static const t::uint32 IS_MLA
Definition: arm.h:41
virtual void handleIO(Address addr, t::uint32 size, IOManager &man)=0
virtual t::uint16 multiMask(Inst *inst)=0
virtual ~IOManager(void)
uint32 size
Definition: arm.h:30
Definition: arm.h:59
Definition: arm.h:37
virtual void free(void *decoded)=0
Identifier< bool > IS_PC_RELATIVE
This identifier is set to true on load/store instructions accessing the memory through the PC registe...
virtual void * decode(Inst *inst)=0
The representation of an address in OTAWA.
Definition: base.h:54
static const t::uint32 IS_TWO_REG
Definition: arm.h:42
virtual void write(Address a, t::uint32 size, t::uint8 *data)=0
uint8_t uint8
Definition: arm.h:58
Definition: arm.h:57
virtual ~Info(void)
This class represents identifier with a typed associated value.
Definition: Identifier.h:51
virtual void read(Address a, t::uint32 size, t::uint8 *data)=0
This class represents assembly instruction of a piece of code.
Definition: Inst.h:62
Identifier< bool > IS_SP_RELATIVE
This identifier is set to true on load/store instructions accessing the memory through the SP or the ...
multiple_t
Definition: arm.h:56
static const t::uint32 IS_THUMB_BX
Definition: arm.h:45
static const t::uint32 IS_SWP
Definition: arm.h:44
static Identifier< Info * > ID
Definition: arm.h:39
uint16_t uint16
uint32_t uint32
Identifier< int > NUM_REGS_LOAD_STORE
This property is put the ARM loader on instruction representing the ARM "LDMxx" and "STMxx" instructi...