Otawa  0.10
Inst.h
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1 /*
2  * $Id $
3  * Inst class interface
4  *
5  * This file is part of OTAWA
6  * Copyright (c) 2003-08, IRIT UPS.
7  *
8  * OTAWA is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * OTAWA is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with OTAWA; if not, write to the Free Software
20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21  */
22 #ifndef OTAWA_INST_H
23 #define OTAWA_INST_H
24 
25 #include <elm/string.h>
26 #include <elm/io.h>
27 #include <elm/genstruct/Table.h>
28 #include <elm/genstruct/Vector.h>
29 #include <otawa/prog/ProgItem.h>
30 #include <otawa/properties.h>
31 #include <otawa/prog/features.h>
32 #include <otawa/hard/Platform.h>
33 
34 namespace otawa {
35 
36 // Declaration
37 class Inst;
38 //class PseudoInst;
39 namespace hard {
40  class Platform;
41  class Register;
42 }
43 namespace sem { class Block; }
44 
45 // Register usage
47 class RegIter: public PreIterator<RegIter, const hard::Register *> {
48 public:
49  inline RegIter(const RegSet& s, hard::Platform *p): set(s), i(0), pf(p) { }
50  //inline RegIter(const RegSet& s, WorkSpace *ws): set(s), i(0), pf(ws->process()->platform()) { }
51  inline bool ended(void) const { return i >= set.length(); }
52  inline const hard::Register *item(void) const { return pf->findReg(set[i]); }
53  inline void next(void) { i++; }
54 private:
55  const RegSet& set;
56  int i;
58 };
59 
60 
61 // Inst class
62 class Inst: public ProgItem {
63  friend class CodeItem;
64 public:
65 
66  // Kind management
68  static const kind_t IS_COND = 0x00001;
69  static const kind_t IS_CONTROL = 0x00002;
70  static const kind_t IS_CALL = 0x00004;
71  static const kind_t IS_RETURN = 0x00008;
72  static const kind_t IS_MEM = 0x00010;
73  static const kind_t IS_LOAD = 0x00020;
74  static const kind_t IS_STORE = 0x00040;
75  static const kind_t IS_INT = 0x00080;
76  static const kind_t IS_FLOAT = 0x00100;
77  static const kind_t IS_ALU = 0x00200;
78  static const kind_t IS_MUL = 0x00400;
79  static const kind_t IS_DIV = 0x00800;
80  static const kind_t IS_SHIFT = 0x01000;
81  static const kind_t IS_TRAP = 0x02000;
82  static const kind_t IS_INTERN = 0x04000;
83  static const kind_t IS_MULTI = 0x08000;
84  static const kind_t IS_SPECIAL = 0x10000;
85  static const kind_t IS_INDIRECT = 0x10000;
86  static const kind_t IS_UNKNOWN = 0x20000;
87  static const kind_t IS_ATOMIC = 0x40000;
88  static const kind_t IS_BUNDLE = 0x80000;
89 
90  // null instruction
91  static Inst& null;
92 
93  // Accessors
94  inline Inst *nextInst(void) const
95  { ProgItem *item = next(); if(!item) return 0; else return item->toInst(); }
96  inline Inst *prevInst(void) const
97  { ProgItem *item = previous(); if(!item) return 0; else return item->toInst(); }
98  virtual void dump(io::Output& out);
99 
100  // Kind access
101  virtual kind_t kind(void) = 0;
102  inline bool meets(kind_t mask) { return (kind() & mask) == mask; }
103  inline bool oneOf(kind_t mask) { return kind() & mask; }
104  inline bool noneOf(kind_t mask) { return !oneOf(mask); }
105 
106  inline bool isIntern(void) { return oneOf(IS_INTERN); }
107  inline bool isMem(void) { return oneOf(IS_MEM); }
108  inline bool isControl(void) { return oneOf(IS_CONTROL); }
109  inline bool isLoad(void) { return oneOf(IS_LOAD); }
110  inline bool isStore(void) { return oneOf(IS_STORE); }
111  inline bool isBranch(void)
112  { return oneOf(IS_CONTROL) && noneOf(IS_RETURN | IS_CALL | IS_TRAP); }
113  inline bool isCall(void) { return oneOf(IS_CALL); }
114  inline bool isReturn(void) { return oneOf(IS_RETURN); }
115  inline bool isConditional(void) { return oneOf(IS_COND); }
116  inline bool isMulti(void) { return meets(IS_MEM | IS_MULTI); }
117  inline bool isSpecial(void) { return oneOf(IS_SPECIAL); }
118  inline bool isMul(void) { return oneOf(IS_MUL); }
119  inline bool isDiv(void) { return oneOf(IS_DIV); }
120  inline bool isIndirect(void) { return oneOf(IS_INDIRECT); }
121  inline bool isUnknown(void) { return oneOf(IS_UNKNOWN); }
122  inline bool isAtomic(void) { return oneOf(IS_ATOMIC); }
123  inline bool isBundle(void) { return oneOf(IS_BUNDLE); }
124  inline bool isBundleEnd(void) { return !oneOf(IS_BUNDLE); }
125 
126  // other accessors
127  virtual Inst *target(void);
128  virtual Type *type(void);
129  virtual void semInsts(sem::Block& block);
130  virtual int semInsts(sem::Block& block, int temp);
131  virtual int semWriteBack(sem::Block& block, int temp);
132  virtual delayed_t delayType(void);
133  virtual int delaySlots(void);
134  virtual void readRegSet(RegSet& set);
135  virtual void writeRegSet(RegSet& set);
136 
137  // ProgItem overload
138  virtual Inst *toInst(void);
139 
140  // deprecated
143  virtual int multiCount(void);
144 
145 
146 protected:
148  virtual ~Inst(void) { };
149 };
150 
151 
152 // output
154  inst->dump(out);
155  return out;
156 }
157 
158 } // namespace otawa
159 
160 #endif // OTAWA_INST_H
bool isReturn(void)
Test if the instruction is a sub-program return, that is, it modifies the control flow retrieving its...
Definition: Inst.h:114
bool isBundle(void)
On VLIW architecture, mark an instruction that is part of a bundle but not last instruction.
Definition: Inst.h:123
bool isMulti(void)
Test if the instruction is multi-memory accesss load / store.
Definition: Inst.h:116
struct otawa::sem::inst inst
static const kind_t IS_INTERN
Mask of an instruction performing setup internal to the processor.
Definition: Inst.h:82
void set(T *target, int size, const T &v)
bool isIntern(void)
Test if the instruction neither access memory, nor modify control flow.
Definition: Inst.h:106
bool ended(void) const
Definition: Inst.h:51
static Inst & null
Null instruction with null address and null size (no kind).
Definition: Inst.h:91
static const kind_t IS_MUL
Mask of a multiplication instruction.
Definition: Inst.h:78
bool isStore(void)
Test if the instruction is a store, that is, it performs only one simple memory write.
Definition: Inst.h:110
t::uint32 mask
Definition: base.h:45
static const kind_t IS_INT
Mask of an instruction processing integer.
Definition: Inst.h:75
static const kind_t IS_CALL
Mask of a call instruction.
Definition: Inst.h:70
Definition: Inst.h:47
virtual Inst * toInst(void)
Return the instruction matching the current item.
Definition: instruction.cpp:471
static const kind_t IS_MEM
Mask of an instruction accessing the memory.
Definition: Inst.h:72
ProgItem * next(void) const
Get the next program item.
Definition: prog_ProgItem.cpp:44
Inst * nextInst(void) const
Definition: Inst.h:94
hard::Platform * pf
Definition: Inst.h:57
bool isUnknown(void)
Test if an instruction is unknown.
Definition: Inst.h:121
static const kind_t IS_COND
Mask of a conditional instruction of an instruction kind.
Definition: Inst.h:68
virtual delayed_t delayType(void)
For a branch instruction, returns the type of management for delay slots.
Definition: instruction.cpp:454
const hard::Register * item(void) const
Definition: Inst.h:52
A block represents a sequence of semantic instructions inst.
Definition: inst.h:183
bool isMul(void)
Test if the instruction is a multiplication.
Definition: Inst.h:118
virtual void dump(io::Output &out)
Output a displayable representation of the instruction.
Definition: instruction.cpp:320
elm::io::Output & operator<<(elm::io::Output &out, Address addr)
Definition: base.cpp:188
bool isCall(void)
Test if the instruction is a sub-program call, that is, it changes the control flow but stores the cu...
Definition: Inst.h:113
bool isControl(void)
Test if the instruction changes the control flow.
Definition: Inst.h:108
static const kind_t IS_SPECIAL
This mask denotes an instruction that is processed in a special way in the pipeline.
Definition: Inst.h:84
static const elm::genstruct::Table< hard::Register * > no_regs
A table containing no sets.
Definition: Inst.h:147
virtual Inst * toInst(void)
Return the instruction matching the current item.
Definition: prog_ProgItem.cpp:95
delayed_t
Enumeration giving the type of delayed modes used by control instruction.
Definition: features.h:30
bool isBundleEnd(void)
On VLIW architecture, mark an instruction that is the last instruction of a bundle.
Definition: Inst.h:124
RegIter(const RegSet &s, hard::Platform *p)
Definition: Inst.h:49
bool isLoad(void)
Test if the instruction is a load, that is, it performs only one simple memory read.
Definition: Inst.h:109
static const kind_t IS_ALU
Mask of an instruction performing a computation.
Definition: Inst.h:77
int length(void) const
bool isConditional(void)
Test if this instruction is conditional.
Definition: Inst.h:115
Inst * prevInst(void) const
Definition: Inst.h:96
static const kind_t IS_FLOAT
Mask of an instruction processing floats.
Definition: Inst.h:76
void next(void)
Definition: Inst.h:53
bool noneOf(kind_t mask)
Definition: Inst.h:104
virtual kind_t kind(void)=0
Get the kind of the current instruction.
ProgItem * previous(void) const
Get the previous program item.
Definition: prog_ProgItem.cpp:57
virtual void semInsts(sem::Block &block)
Return a list of semantics pseudo-instruction representing the effect of the instruction.
Definition: instruction.cpp:413
friend class CodeItem
Definition: Inst.h:63
bool isDiv(void)
Test if the instruction is a division.
Definition: Inst.h:119
elm::t::uint32 kind_t
Definition: Inst.h:67
static const kind_t IS_SHIFT
Mask of an instruction performing a shift (this includes logicial shifts, arithmetic shifts and rotat...
Definition: Inst.h:80
virtual void readRegSet(RegSet &set)
Get the list of register read by the instruction.
Definition: instruction.cpp:355
sys::SystemOutStream & out
genstruct::Vector< t::uint16 > RegSet
Definition: Inst.h:46
static const kind_t IS_LOAD
Mask of an instruction performing a memory load.
Definition: Inst.h:73
static const kind_t IS_INDIRECT
Definition: Inst.h:85
virtual void writeRegSet(RegSet &set)
Get the list of register written by the instruction.
Definition: instruction.cpp:366
virtual int delaySlots(void)
For a branch instruction, returns the number of delayed instructions.
Definition: instruction.cpp:464
virtual ~Inst(void)
Definition: Inst.h:148
static const kind_t IS_MULTI
This mask denotes an instructions that perform multi-value store or load.
Definition: Inst.h:83
bool meets(kind_t mask)
Definition: Inst.h:102
virtual const elm::genstruct::Table< hard::Register * > & readRegs(void)
Get the registers read by the instruction.
Definition: instruction.cpp:379
bool oneOf(kind_t mask)
Definition: Inst.h:103
This class records information about the architecture where the processed program will run...
Definition: Platform.h:48
virtual Inst * target(void)
Get the target of the branch.
Definition: instruction.cpp:346
static const kind_t IS_ATOMIC
Definition: Inst.h:87
static const kind_t IS_BUNDLE
Applied on a VLIW architecture, marks instructions part of a bundle but not at end of the bundle...
Definition: Inst.h:88
virtual Type * type(void)
Definition: instruction.cpp:330
bool isIndirect(void)
Definition: Inst.h:120
static const kind_t IS_STORE
Definition: Inst.h:74
This class represents assembly instruction of a piece of code.
Definition: Inst.h:62
bool isAtomic(void)
Test if the instruction is an atomic synchronization instruction, that is, performing an atomic read-...
Definition: Inst.h:122
static const kind_t IS_CONTROL
Mask of a control instruction.
Definition: Inst.h:69
static const kind_t IS_RETURN
Mask of a return instruction.
Definition: Inst.h:71
bool isMem(void)
Test if the instruction access memory.
Definition: Inst.h:107
bool isBranch(void)
Test if the instruction is a branch, that is, it changes the control flow but performs neither a memo...
Definition: Inst.h:111
int i
Definition: Inst.h:56
virtual const elm::genstruct::Table< hard::Register * > & writtenRegs(void)
Get the registers written by the instruction.
Definition: instruction.cpp:390
Base class of the components of a program file segment.
Definition: ProgItem.h:23
Objects of this class are simple machine register, more accurately unbreakable atomic registers...
Definition: Register.h:38
static const kind_t IS_TRAP
Mask of a trap instruction.
Definition: Inst.h:81
bool isSpecial(void)
Test if the instruction is a complex special instruction.
Definition: Inst.h:117
static const kind_t IS_UNKNOWN
This mask denotes an unknown instruction: its opcode does not match any known instruction in the load...
Definition: Inst.h:86
Register * findReg(int uniq) const
Find the register matching the given unique identifier.
Definition: hardware_Platform.cpp:674
This class describes the type of the data in the program.
Definition: type.h:39
const RegSet & set
Definition: Inst.h:55
static const kind_t IS_DIV
Mask of a division instruction.
Definition: Inst.h:79
virtual int semWriteBack(sem::Block &block, int temp)
VLIW instructions of a bundle perform read and write-back of registers in parallel.
Definition: instruction.cpp:443
uint32_t uint32
virtual int multiCount(void)
This function is only defined for ISA supporting the IS_MULTI attribute.
Definition: instruction.cpp:482